$regfile = "m328PBdef.dat" '
$hwstack = 100
$swstack = 100
$framesize = 60
$crystal = 1000000 '
$baud = 9600
' ******************************************************************************************
Dim Control_register As Word
Dim Freq_reg As Double At &H0208
Dim Freq As Dword At &H0200 '
Dim Frequency_low As Word At &H0204 '
Dim Frequency_high As Word At &H0206 '
Const Scale_f = 10.73741824
Config Portb = Output
Psynch Alias Portb.5 ' Control lines for AD9833
Sclk Alias Portb.6
Sdata Alias Portb.7
' Starting values
Freq_reg = 100000
Freq_reg = Freq_reg * Scale_f
Freq = Freq_reg
Gosub Frec_converter
Psynch = 1 ' set control line high
Gosub Init_ad9833 ' send init word to AD9833
Do
Gosub Sinewave
Gosub Load_freq_register
Waitms 5000
Gosub Triangular
Gosub Load_freq_register
Waitms 5000
'Gosub Squarewave
'Gosub Load_freq_register
'Waitms 5000
Loop
End
' ******************************************* AD8833 COMMANDS *************************************
'
'Send out control words to AD9833
'Operation Register Value
'Set Frequency FREQ0 FREEQ0: D15 = 0, D14 = 1
'Set Frequency FREQ1 FREEQ1: D15 = 1, D14 = 0
'Set Phase PHASE0 PHASE0: D15 = 1, D14 = 1, D13 = 0
'Set Phase PHASE1 PHASE0: D15 = 1, D14 = 1, D13 = 1
'Set Mode - Sine CNTRL D5 = 0, D1 = 0
'Set Mode - Triangular CNTRL D5 = 0, D1 = 1
'Set Mode - Clock CNTRL D5 = 1, D1 = 0
'Set Frequency Register CNTRL D11 = 0 (choose FREQ0); D11 = 1 (choose FREQ1);
'Reset CNTRL D8 = 0 or 1
'Sleep - No power-down CNTRL D7 = 0, D6 = 0
'Sleep - DAC powered down (PD) CNTRL D7 = 0, D6 = 1
'Sleep - Internal clock (IC) disabled CNTRL D7 = 1, D6 = 0
'Sleep - DAC PD and IC disabled CNTRL D7 = 1, D6 = 1
Init_ad9833:
Sclk = 1 ' make sure it is high
Psynch = 0 ' lower the PSYNCH pin
Control_register = &B0010_0001_0000_0000 ' RST asserted and set up for sine wave
Shiftout Sdata , Sclk , Control_register , 0 , 16 ' MSB first on falling clock
Psynch = 1 ' raise it to finish transfer
Return
Sinewave:
Sclk = 1 ' make sure it is high
Psynch = 0 ' lower the PSYNCH pin
Control_register = &B0010_0000_0000_0000 ' RST now removed and set up for sine wave
Shiftout Sdata , Sclk , Control_register , 0 , 16 ' MSB first on falling clock
Psynch = 1 ' raise it to finish transfer
Return
Triangular:
Sclk = 1 ' make sure it is high
Psynch = 0 ' lower the PSYNCH pin
Control_register = &B0010_0000_0000_0010 ' RST removed and set up for triangular wave
Shiftout Sdata , Sclk , Control_register , 0 , 16 ' MSB first on falling clock
Psynch = 1 ' raise it to finish transfer
Return
Squarewave:
Sclk = 1 ' make sure it is high
Psynch = 0 ' lower the PSYNCH pin
Control_register = &B0010_0000_0010_1000 ' RST removed and set up for square wave
Shiftout Sdata , Sclk , Control_register , 0 , 16 ' MSB first on falling clock
Psynch = 1 ' raise it to finish transfer
Return
Frec_converter:
' ***************************************** LOAD AD9833 FREQ REGISTER *****************************
'https://www.avrfreaks.net/forum/ad9833-dds-waveform-generator-frequency-word
'Note: Changed to manually select DDS chip, write 6 bytes, then manually
'deassert DDS chip, around all 6 bytes, not around 2 byte words.
'Freq is >10000 and <= 12.5 MHz
'Calculate the Freq Register using Double precision
'On Entry have FD3 = FM = 10.73741824
'Generate an 8 byte, (64 bit), value for the value to be further
'formatted to put in the frequency register.
'First Send Control Word, above.
'Then send two bytes: 01 and 14 LSBs of data
'Then send two bytes: 01 and 14 MSBs of data
'Example:
'12.5 MHZ (the Highest Freq in range for this chip and project:
'12.5MHz = 12500000 Hz
'12500000 * 10.73741824 = 134,217,728
'This is the 28 bit data for the freq register
'134,217,728 = 1000 0000 0000 0000 0000 0000 0000 (28 bits)
'Now format it for loading into the chip, 2 writes of 2 bytes each
'Send 01 and 14 LSB: 0100 0000 0000 0000
'Then 01 and 14 MSB: 0110 0000 0000 0000
$asm
push R16
PUSH R17
PUSH R18
IN R18,SREG
PUSH R18
' lower 14 bit Frequency_low
LDS R18, &H0200
STS &H0204 , R18
LDS R18, &H0201
CBR R18, &HC0
SBR R18, &H40
STS &H0205 , R18
' upper 14 bit Frequency_high
LDS R16, &H0201
LDS R17, &H0202
LDS R18, &H0203
LSL R16
ROL R17
roL R18
LSL R16
roL R17
roL R18
STS &H0206 , R17
CBR R18, &HC0
SBR R18, &H40
STS &H0207 , R18
POP R18
Out Sreg , R18
POP R18
POP R17
pop R16
$end Asm
Return
Load_freq_register:
Sclk = 1 ' make sure it is high
Psynch = 0 ' lower the PSYNCH pin
Shiftout Sdata , Sclk , Frequency_low , 0 , 16 ' MSB first on falling clock
Psynch = 1 ' raise it to finish transfer
Sclk = 1 ' make sure it is high
Psynch = 0 ' lower the PSYNCH pin
Shiftout Sdata , Sclk , Frequency_high , 0 , 16 ' MSB first on falling clock
Psynch = 1 ' raise it to finish transfer
Return
